TSMCのIEDM 2019での5nmプロセスでのEUVの説明。「5nm CMOS Production Technology Platform featuring full-fledged EUV, and High Mobility Channel FinFETs with densest 0.021μm2 SRAM cells for Mobile SoC and High Performance Computing Applications」(G. Yeap, et al., IEDM 2019)。5nm EUVでも1D配線であることがわかる

TSMCのIEDM 2019での5nmプロセスでのEUVの説明。「5nm CMOS Production Technology Platform featuring full-fledged EUV, and High Mobility Channel FinFETs with densest 0.021μm2 SRAM cells for Mobile SoC and High Performance Computing Applications」(G. Yeap, et al., IEDM 2019)。5nm EUVでも1D配線であることがわかる